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Using Ethernet as an integrated embedded computer processor interconnect requires significant transaction acceleration and solutions to the Ethernet Media Access Controller (MAC) as well as the Ethernet switch devices themselves. Even with these enhancements, RDMA operations should be limited to large block transactions to amortize the overhead of using Ethernet.

Standards that have been deployed to solve this problem include the iWARP RDMA protocol from the Internet Engineering Task Force and RDMA over Converged Ethernet (RoCE). Both iWARP and RoCE are typically implemented through acceleration coprocessors. Despite this acceleration, RDMA transactions must still be carefully managed to reduce communications overhead. The reason is that although Ethernet offers high bandwidth, especially in 10 GbE and 40 GbE implementations, it also has high transaction embedded computer  tencies that are typically measured in microseconds.

refer to: http://embedded-computing.com/articles/rapidio-optimized-low-latency-processor-connectivity/#at_pco=cfd-1.0